The present invention relates to a digital signal processing device, a method, and a ΔΣ modulator for applying edit processing, such as volume adjustment and the like, to digital audio data using high-speed 1-bit data.
A method called delta-sigma (ΔΣ) modulation is proposed to digitize voice signals. 1 (1. Yamazaki, Yoshio. “AD/DA Converter and Digital Filter.” Journal of the Acoustical Society of Japan 46, No. 3 (1990): pp. 251-257.)
FIG. 1 is a block diagram of a ΔΣ modulation circuit for applying ΔΣ modulation to, e.g., 1-bit digital data. In FIG. 1, an input audio signal S is supplied from an input terminal 81 to an integrator 83 via an adder 82. This signal from the integrator 83 is supplied to a comparator 84. The signal is compared to a mid-point potential of, e.g., the input audio signal S and is quantized on a 1-bit basis every sampling period. The frequency for the sampling period (sampling frequency) is 64 or 128 times the conventional frequency 48 kHz or 44.1 kHz.
This quantized data is supplied to a 1-sample delay circuit 85 and is delayed for one sampling period. This delay data is converted to an analog signal in, e.g., a 1-bit D/A converter 86, is added to the adder 82, and is added to the input audio signal S from the input terminal 81. The quantized data output from the comparator 84 is generated as 1-bit data D1 from an output terminal 87. According to ΔΣ modulation processing of this ΔΣ modulation circuit, as described in the above-mentioned document, it is possible to generate audio signals with a high dynamic range using s small number of bits, such as 1 bit, by sufficiently increasing the sampling frequency. It also is possible to provide a wide transmittable frequency band. The ΔΣ modulation circuit is suited for circuit configuration integration and can relatively easily provide A/D conversion accuracy. The ΔΣ modulation circuit is widely used in an A/D converter, for example. A simple analog low-pass filter can be used for restoring the ΔΣ-modulated signal to an analog audio signal. By using these features, the ΔΣ modulation circuit can be applied to recorders and data transmission for handling high-quality data.
The above-mentioned ΔΣ modulation circuit thus generates 1-bit data for music data. In order to edit such music data using a high-speed 1-bit system, the following operation is needed, as disclosed in Japanese Patent Application Laid-Open Publication No. 9-307452 submitted by the applicant of the present invention. In the 1-bit data editing unit 90 shown in FIG. 2, 1-bit input data D1i is input as music data from an input terminal 91. In a multiplier 92, D1i is multiplied by a specified factor k to temporarily convert to multi-bit data Dm. This data is again ΔΣ-modulated in a ΔΣ modulator 93 to be restored to 1-bit signal D1′. The ΔΣ modulator 93 is a multistage modulator in a plurality of orders using a plurality of integrators and has a more complicated configuration than for the ΔΣ modulation circuit in FIG. 1.
However, the above-mentioned configuration always lets signals pass the ΔΣ modulator 93. Even if no volume adjustment or the like is needed, namely, the factor k is 1.0, music data D11 always passes the ΔΣ modulator 93, degrading sound quality. A fraction eliminator 94 is used for performing specified addition and subtraction to eliminate a fraction remaining in an integrator inside the ΔΣ modulator 93. This operation approximates patterns for an original sound signal D11 and a ΔΣ modulation signal D1′. A delay circuit 96 is used to approximately align phases for the ΔΣ modulation signal D1′ and the original sound signal D1i. A control unit 97 monitors signal patterns for the ΔΣ modulation signal D1′ and the original sound signal D11. When these patterns almost match, a selector 95 is switched to side a for the delayed original sound signal D1d from side b for the ΔΣ modulation signal D1′.
When no volume adjustment or the like is needed, this process can switch the ΔΣ modulation signal D1′ over to the delayed original sound signal D11 and generate a 1-bit data output from an output terminal 95 without generating a switching noise or the like. This process also can bypass reprocessing in the ΔΣ modulator 93.
However, noise may be generated during this switching operation, depending on the specifications of the ΔΣ modulator 93 to be used and the frequency of the 1-bit data D11 to be input. Generally, a high-order ΔΣ modulator can provide a high S/N ratio in an audible band. On the other hand, frequency characteristics change at a point near the audible band. A phase can easily rotate at a high frequency. When high-order ΔΣ modulation is used and the input signal frequency is high, a level difference and a phase shift occurs between the delayed original sound signal D11 and the ΔΣ modulation signal D1′. Noise occurs when the selector 95 switches between these signals.
When the low-order ΔΣ modulator 93 is used, it hardly generates a noise during switchover because of little level difference and phase rotation. On the other hand, the audible band causes a low S/N ratio, lowering the S/N ratio when the ΔΣ modulator 93 is not bypassed.